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salaud@XXXX:~$ decode-dimms
# decode-dimms version 5164 (2008-03-26 14:48:21 +0100)


Memory Serial Presence Detect Decoder
By Philip Edelbrock, Christian Zuckschwerdt, Burkart Lingner,
Jean Delvare, Trent Piepho and others

Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0050
Guessing DIMM is in bank 1

---=== SPD EEPROM Information ===---
EEPROM Checksum of bytes 0-62 OK (0xE3)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2

---=== Memory Characteristics ===---
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64
Ranks 1
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-6-6-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 3.00 ns
Maximum Access Time at CAS 5 0.45 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns

---=== Timing Parameters ===---
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 15.00 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 15.00 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 60.00 ns
Minimum Recovery Delay (tRFC) 127.50 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns

---=== Manufacturing Information ===---
Manufacturer Invalid
Custom Manufacturer Data FF 00 00 00 00 00 00 00 ("????????")
Part Number RM1GE484CA-64FC
Manufacturing Date 2008-W47

Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0051
Guessing DIMM is in bank 2

---=== SPD EEPROM Information ===---
EEPROM Checksum of bytes 0-62 OK (0xE3)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2

---=== Memory Characteristics ===---
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64
Ranks 1
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-6-6-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 3.00 ns
Maximum Access Time at CAS 5 0.45 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns

---=== Timing Parameters ===---
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 15.00 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 15.00 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 60.00 ns
Minimum Recovery Delay (tRFC) 127.50 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns

---=== Manufacturing Information ===---
Manufacturer Invalid
Custom Manufacturer Data FF 00 00 00 00 00 00 00 ("????????")
Part Number RM1GE484CA-64FC
Manufacturing Date 2008-W47

Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0052
Guessing DIMM is in bank 3

---=== SPD EEPROM Information ===---
EEPROM Checksum of bytes 0-62 OK (0xE3)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2

---=== Memory Characteristics ===---
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64
Ranks 1
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-6-6-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 3.00 ns
Maximum Access Time at CAS 5 0.45 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns

---=== Timing Parameters ===---
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 15.00 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 15.00 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 60.00 ns
Minimum Recovery Delay (tRFC) 127.50 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns

---=== Manufacturing Information ===---
Manufacturer Invalid
Custom Manufacturer Data FF 00 00 00 00 00 00 00 ("????????")
Part Number RM1GE484CA-64FC
Manufacturing Date 2008-W47

Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0053
Guessing DIMM is in bank 4

---=== SPD EEPROM Information ===---
EEPROM Checksum of bytes 0-62 OK (0xE3)
# of bytes written to SDRAM EEPROM 128
Total number of bytes in EEPROM 256
Fundamental Memory type DDR2 SDRAM
SPD Revision 1.2

---=== Memory Characteristics ===---
Maximum module speed 800MHz (PC2-6400)
Size 1024 MB
Banks x Rows x Columns x Bits 8 x 14 x 10 x 64
Ranks 1
SDRAM Device Width 8 bits
Module Height 30.0 mm
Module Type UDIMM (133.25 mm)
DRAM Package Planar
Voltage Interface Level SSTL 1.8V
Refresh Rate Reduced (7.8 us) - Self Refresh
Supported Burst Lengths 4, 8
tCL-tRCD-tRP-tRAS 6-6-6-18
Supported CAS Latencies (tCL) 6T, 5T, 4T
Minimum Cycle Time at CAS 6 (tCK min) 2.50 ns
Maximum Access Time at CAS 6 (tAC) 0.40 ns
Minimum Cycle Time at CAS 5 3.00 ns
Maximum Access Time at CAS 5 0.45 ns
Minimum Cycle Time at CAS 4 3.75 ns
Maximum Access Time at CAS 4 0.50 ns
Maximum Cycle Time (tCK max) 8.00 ns

---=== Timing Parameters ===---
Address/Command Setup Time Before Clock (tIS) 0.17 ns
Address/Command Hold Time After Clock (tIH) 0.25 ns
Data Input Setup Time Before Strobe (tDS) 0.05 ns
Data Input Hold Time After Strobe (tDH) 0.12 ns
Minimum Row Precharge Delay (tRP) 15.00 ns
Minimum Row Active to Row Active Delay (tRRD) 7.50 ns
Minimum RAS# to CAS# Delay (tRCD) 15.00 ns
Minimum RAS# Pulse Width (tRAS) 45.00 ns
Write Recovery Time (tWR) 15.00 ns
Minimum Write to Read CMD Delay (tWTR) 7.50 ns
Minimum Read to Pre-charge CMD Delay (tRTP) 7.50 ns
Minimum Active to Auto-refresh Delay (tRC) 60.00 ns
Minimum Recovery Delay (tRFC) 127.50 ns
Maximum DQS to DQ Skew (tDQSQ) 0.20 ns
Maximum Read Data Hold Skew (tQHS) 0.30 ns

---=== Manufacturing Information ===---
Manufacturer Invalid
Custom Manufacturer Data FF 00 00 00 00 00 00 00 ("????????")
Part Number RM1GE484CA-64FC
Manufacturing Date 2008-W47

Number of SDRAM DIMMs detected and decoded: 4

Mint láthatod, az eeprom szerint nálam Manufacturer:Invalid 6-6-6-18-as időzítéssel. A valóságban ezek CSX ramok, 5-5-5-15-ös időzítéssel, gyártó weboldala szerint is. Manapság a gyártók előszeretettel elkúrják ez eeprom-ban lévő információkat. Hogy miért, azt nem tudom, szerintem jó nagy ostobaságra vall ez. BIOS-ban kézzel állítsd be az időzítéseket, és kész. Jah, és nem érdemes memóriára háklis alaplapot venni...

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